riperiperi 9ef94c8292 ARMeilleure: Move TPIDR_EL0 and TPIDRRO_EL0 to NativeContext (#4661) ... * ARMeilleure: Move TPIDR_EL0 and TPIDRRO_EL0 to NativeContext Some games access these system registers several tens of thousands of times in a second from many different threads. While this isn't really crippling, it is a lot of wasted time spent in a reverse pinvoke transition. Example games are Pokemon Scarlet/Violet and BOTW. These games have a lot of different potential bottlenecks so it's unlikely you will see a consistent improvement, but it definitely disappears from the cpu profile. * Remove unreachable code. * Add ulong conversion for offsets * Nit		2023-04-11 08:55:04 +02:00
..
CryptoHelper.cs
InstEmitAlu.cs
InstEmitAlu32.cs	Implement PLD and SUB (imm16) on T32, plus UADD8, SADD8, USUB8 and SSUB8 on both A32 and T32 (#3693)	2022-09-13 19:51:40 -03:00
InstEmitAluHelper.cs	T32: Add Vfp instructions (#3690)	2022-09-10 23:03:14 -03:00
InstEmitBfm.cs
InstEmitCcmp.cs
InstEmitCsel.cs
InstEmitDiv.cs
InstEmitException.cs
InstEmitException32.cs
InstEmitFlow.cs
InstEmitFlow32.cs	T32: Add Vfp instructions (#3690)	2022-09-10 23:03:14 -03:00
InstEmitFlowHelper.cs
InstEmitHash.cs
InstEmitHash32.cs	Minor code formatting (#4498)	2023-03-04 14:43:08 +01:00
InstEmitHashHelper.cs	Minor code formatting (#4498)	2023-03-04 14:43:08 +01:00
InstEmitHelper.cs
InstEmitMemory.cs
InstEmitMemory32.cs
InstEmitMemoryEx.cs	A32/T32/A64: Implement Hint instructions (CSDB, SEV, SEVL, WFE, WFI, YIELD) (#3694)	2022-09-14 18:18:15 -03:00
InstEmitMemoryEx32.cs
InstEmitMemoryExHelper.cs
InstEmitMemoryHelper.cs
InstEmitMove.cs
InstEmitMul.cs
InstEmitMul32.cs
InstEmitSimdArithmetic.cs	ARMeilleure: Respect FZ/RM flags for all floating point operations (#4618)	2023-04-10 12:22:58 +02:00
InstEmitSimdArithmetic32.cs	Implement JIT Arm64 backend (#4114)	2023-01-10 19:16:59 -03:00
InstEmitSimdCmp.cs	Implement JIT Arm64 backend (#4114)	2023-01-10 19:16:59 -03:00
InstEmitSimdCmp32.cs	Implement JIT Arm64 backend (#4114)	2023-01-10 19:16:59 -03:00
InstEmitSimdCrypto.cs
InstEmitSimdCrypto32.cs
InstEmitSimdCvt.cs	Implement JIT Arm64 backend (#4114)	2023-01-10 19:16:59 -03:00
InstEmitSimdCvt32.cs	ARMeilleure: Respect FZ/RM flags for all floating point operations (#4618)	2023-04-10 12:22:58 +02:00
InstEmitSimdHash.cs
InstEmitSimdHash32.cs
InstEmitSimdHashHelper.cs
InstEmitSimdHelper.cs	ARMeilleure: Respect FZ/RM flags for all floating point operations (#4618)	2023-04-10 12:22:58 +02:00
InstEmitSimdHelper32.cs	ARMeilleure: Respect FZ/RM flags for all floating point operations (#4618)	2023-04-10 12:22:58 +02:00
InstEmitSimdHelper32Arm64.cs	Implement JIT Arm64 backend (#4114)	2023-01-10 19:16:59 -03:00
InstEmitSimdHelperArm64.cs	Implement JIT Arm64 backend (#4114)	2023-01-10 19:16:59 -03:00
InstEmitSimdLogical.cs	ARMeilleure: Add initial support for AVX512 (EVEX encoding) (cont) (#4147)	2023-03-20 16:09:24 -03:00
InstEmitSimdLogical32.cs	ARMeilleure: Add initial support for AVX512 (EVEX encoding) (cont) (#4147)	2023-03-20 16:09:24 -03:00
InstEmitSimdMemory.cs
InstEmitSimdMemory32.cs	Fix increment on Arm32 NEON VLDn/VSTn instructions with regs > 1 (#3695)	2022-09-13 08:24:09 +02:00
InstEmitSimdMove.cs
InstEmitSimdMove32.cs	ARMeilleure: Add initial support for AVX512 (EVEX encoding) (cont) (#4147)	2023-03-20 16:09:24 -03:00
InstEmitSimdShift.cs	Implement JIT Arm64 backend (#4114)	2023-01-10 19:16:59 -03:00
InstEmitSimdShift32.cs	Fpsr and Fpcr freed. (#3701)	2022-09-20 18:55:13 -03:00
InstEmitSystem.cs	ARMeilleure: Move TPIDR_EL0 and TPIDRRO_EL0 to NativeContext (#4661)	2023-04-11 08:55:04 +02:00
InstEmitSystem32.cs	ARMeilleure: Move TPIDR_EL0 and TPIDRRO_EL0 to NativeContext (#4661)	2023-04-11 08:55:04 +02:00
InstName.cs	A32/T32/A64: Implement Hint instructions (CSDB, SEV, SEVL, WFE, WFI, YIELD) (#3694)	2022-09-14 18:18:15 -03:00
NativeInterface.cs	ARMeilleure: Move TPIDR_EL0 and TPIDRRO_EL0 to NativeContext (#4661)	2023-04-11 08:55:04 +02:00
SoftFallback.cs	Fpsr and Fpcr freed. (#3701)	2022-09-20 18:55:13 -03:00
SoftFloat.cs	Fpsr and Fpcr freed. (#3701)	2022-09-20 18:55:13 -03:00